Re: [PATCH v2] Makefile: collect some Makefile variables instead of directly assignment

From: Alexander Kuleshov <kuleshovmail@gmail.com>
Date: Jan 21, 2015, 09:33 UTC
Message-ID: <CANCZXo6DaSB4eiqQ6XrDpYMYeES50t1pi8CJwdzPZ2DOQpRjig@mail.gmail.com>
In-Reply-To: <xmqqzj9cwkq4.fsf@gitster.dls.corp.google.com>

Hello Junio,

2015-01-21 15:23 GMT+06:00 Junio C Hamano <gitster@pobox.com>:

Show 12 quoted lines

> Alexander Kuleshov <kuleshovmail@gmail.com> writes:
>
>> Some of Makefile variables as TEST_PROGRAMS_NEED_X and BUILTIN_OBJS filled
>> directly by hand, let's collect it with the standard functions of 'make' util.
>
> I am not sure if we want to do this.
>
> $(wildcard) is a double-edged sword.  It will grab any file that
> matches on the filesystem, not just the ones we want to include in
> the Git source set.  I often have a file called test-something and
> I'd prefer not to see such a random thing included in the build,
> only because the filename matches some pattern.

Yes, grabbing files by test-*.c is unreliable in this case. But what about builtin/*.c? Is there any plans that builtin will contain something another than builtin object files?

Show 7 quoted lines

>
> While "we consider anything with a name that match the pattern we
> say matter (e.g. test-*.c or builtin/*.c) as part of the source set"
> is sometimes handy (it allows us to be lazy), it risks surprising
> unsuspecting users.
>
> So I dunno.