Re: [PATCH] PPC assembly implementation of SHA1
- From
- Benjamin Herrenschmidt <benh@kernel.crashing.org>
- Date
- Apr 24, 2005, 02:49 UTC
- Message-ID
- <1114310968.5444.24.camel@gaston>
- In-Reply-To
- <20050423124246.30071.qmail@science.horizon.com>
On Sat, 2005-04-23 at 12:42 +0000, linux@horizon.com wrote:
Show 5 quoted lines
> - You don't need to decrement %r1 before saving registers. > The PPC calling convention defines a "red zone" below the > current stack pointer that is guaranteed never to be touched > by signal handlers or the like. This is specifically for > leaf procedure optimization, and is at least 224 bytes.
On ELF ppc32 ABI ? Hrm... the SysV ABI document says
"The only permitted references with negative offsets from the stack pointer are those described here for establishing a stack frame."
I know MacOS had a red zone, but do we ?
> - Is that many stw/lwz instructions faster than stmw/lmw? > The latter is at least more cahce-friendly.
More cache friendly ? Hrm.. I wouldn't be sure. Also, I remember readind a while ago that those store/load multiple instructions aren't that recommended. They aren't very good on some CPU models. I would expect the bus/cache bandwidth to be the limiting factor here anyway, and as you point out below, the they don't deal with unaligned access very well in all cases.