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[GSoC][Patch] Add more builtin patterns for userdiff: Add builtin patterns for Verilog

From
LLli li <li0371859@gmail.com>
Date
Mar 13, 2025, 14:23 UTC
Message-ID
<SEZPR01MB5486F5B360F1DFA607C69F37A3D32@SEZPR01MB5486.apcprd01.prod.exchangelabs.com>

Add Verilog built-in to userdiff.c. I read the code and checked the previous mailing list. I found that if I want git to recognize Verilog syntax, I need to add Verilog regular expressions to the userdiff_driver array of userdiff.c and modify the .gitattributes file. Yes, I did it. The next step is to write test cases and submit patches. I am not sure if this is in line with the development process specifications. Maybe I should make some adjustments. If so, please let me know.

diff --git a/.gitattributes b/.gitattributes
index 43fa883a84..8aac8574f1 100644
--- a/.gitattributes
+++ b/.gitattributes
@@ -6,6 +6,7 @@
 *.pm text eol=lf diff=perl
 *.py text eol=lf diff=python
 *.bat text eol=crlf
+*.v text eof=lf diff=verilog
 CODE_OF_CONDUCT.md -whitespace
 /Documentation/**/*.adoc text eol=lf
 /command-list.txt text eol=lf
diff --git a/userdiff.c b/userdiff.c
index 340c4eb4f7..9f7e4c427d 100644
--- a/userdiff.c
+++ b/userdiff.c
@@ -336,6 +336,13 @@ PATTERNS("scheme",
         "|([^][)(}{[ \t])+"),
 PATTERNS("tex", "^(\\\\((sub)*section|chapter|part)\\*{0,1}\\{.*)$",
         "\\\\[a-zA-Z@]+|\\\\.|([a-zA-Z0-9]|[^\x01-\x7f])+"),
+PATTERNS("verilog",
+             "^[ \t]*((module|task|function)[ \t].*)$",
+             /* -- */
+             "[a-zA-Z_][a-zA-Z0-9_]*"  
+             "|[0-9]+'[bdh][0-9a-fA-F_]+"  
+             "|<=|>=|==|!=|\\|\\||&&|<<|>>"
+    ),
 { .name = "default", .binary = -1 },
 };
 #undef PATTERNS
Next: Patrick Steinhardt
Message 1 of 2 in “Add more builtin patterns for userdiff: Add builtin patterns for Verilog”
  1. li liMar 13, 2025
  2. Patrick SteinhardtMar 24, 2025

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